What may cause the External Memory Interfaces Intel® Stratix® 10 FPGA IP to not return read data promptly prior to a long idle time? - What may cause the External Memory Interfaces Intel® Stratix® 10 FPGA IP to not return read data promptly prior to a long idle time? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 20.1, the last burst of read data may not return promptly in Read Modify Write (RMW) mode. The read command gets executed whenever there is a new command, a refresh, or an auto-precharge. This last read burst that has been delayed may cause reduced efficiency. Resolution To work around this problem, ensure refresh is executed periodically per DDR4 specification if the User-Refresh option is turned ON, or turn ON the Enable User Auto-precharge option and execute the auto-precharge command for all transactions . Refer to the External Memory Interfaces Intel® Stratix® 10 FPGA IP User Guide for more details. This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 20.2. Custom Fields values: ['novalue'] Troubleshooting 1408170524 False ['External Memory Interfaces Stratix® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.2 20.1 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']