Why does the Scatter-Gather DMA (SG-DMA) Controller Core stall indefinitely if burst transfers are enabled? - Why does the Scatter-Gather DMA (SG-DMA) Controller Core stall indefinitely if burst transfers are enabled? Description The SGDMA will stall indefinitely if it encounters transfer lengths which are not multiples of the burst length. This will only occur if burst transfers are enabled. For example if you configure the SGDMA for 32 bit transfers with a maximum burst length of 2 then you must use transfer lengths that are multiples of eight bytes to avoid this issue. To avoid this issue please upgrade to the Quartus II design software version 8.1 and regenerate your system in SOPC Builder. Related Articles Does the Scatter-Gather DMA Controller Core FIFO depth setting affect the hardware that is generated? Why is the Scatter-Gather DMA Controller Core's (SG-DMA) IRQ for descriptor_complete triggered before the descriptor is updated? Why does the SGDMA sometimes perform destructive writes? Why does each register of my Scatter-Gather DMA Controller Core slave interface take 256bytes? Why does the Scatter-Gather DMA Controller Core (SG-DMA) treat all data as big endian? Why does the Scatter-Gather DMA (SG-DMA) Controller Core restart unexpectedly? Why is the next descriptor register of the Scatter-Gather DMA (SG-DMA) Controller Core not updating while the busy status is set? Why do I get corrupt data read results with the Scatter-Gather DMA Controller Core (SG-DMA)? Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['novalue'] novalue novalue ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']