Why is throughput performance lower than expected when using the AXI Streaming IP for PCI Express* in Compact packing mode? - Why is throughput performance lower than expected when using the AXI Streaming IP for PCI Express* in Compact packing mode? Description Due to a problem in the 25.1 and earlier version of the AXI Streaming IP for PCI Express*, only single read requests are sent per AXI-Streaming Cycle when the IP is configured in compact packing mode. This is a confirmed problem, as multiple Read Request TLPs should be possible in each segment. HIP Native Mode Packing can be used in 25.1 and earlier to achieve the expected throughput. Resolution In the 25.1 and earlier releases of the AXI Streaming IP for PCI Express* in Compact mode, there is no workaround for this problem. This problem is scheduled to be fixed in a future release of the AXI Streaming Intel® FPGA IP for PCI Express*. Custom Fields values: ['novalue'] Troubleshooting 16024036695 False ['R-Tile Avalon-ST for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 24.2 ['Agilex™ 7 FPGAs and SoCs', 'Agilex™ 9 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']