Why is "Report DDR" timing report missing when I have multiple instances of a wide external memory interface? - Why is "Report DDR" timing report missing when I have multiple instances of a wide external memory interface? Description Due to a problem in a timing script for the Quartus® II software version 12.1SP2 and earlier, a design with multiple instances of wide (typically x72 bits or more) external memory interfaces might not show the ‘Report DDR’ timing report. If the "Report DDR" timing report is shown then this problem does not affect your design. Resolution Follow these steps: Identify and open the <project_name>_p0_report_timing_core.tcl . Look for the line with the keyword num_path . Make the following change in that line: From: set num_paths 5000 To: set num_paths 10000 This problem is fixed starting with the Quartus® II software version 13.0. Custom Fields values: ['novalue'] Troubleshooting 2205798056 False ['novalue'] ['FPGA Dev Tools Quartus II Software'] 13.0 12.1 ['Stratix® V E FPGA', 'Stratix® V FPGAs', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']