Single Event Upset - Find information related to Single Event Upsets (SEU) and mitigation guides. Quality Pages {"title":"Single Event Upset"} Single Event Upset (SEU) Single Event Upsets (SEU) Support provides resources for Agilex™ 7, Agilex™ 5, Agilex™ 3, Stratix® 10, Arria® 10, Cyclone® 10, MAX® 10, Stratix® V, Arria® V, Cyclone® V, Stratix® IV, Cyclone® IV, and Arria® II devices. text_link_content Introduction Introduction Single event upsets (SEU) are caused by ionizing radiation strikes in storage elements, such as configuration memory cells, user memory, and registers. In terrestrial applications, the main ionizing radiation sources of concern are alpha particles emitted from radioactive impurities in materials, high-energy neutrons produced by the interaction of cosmic rays with the earth's atmosphere and thermal neutrons that in most cases are thermalized high-energy neutrons but can also be produced in man-made equipment. Studies conducted over the last 20 years have led to high purity package materials minimizing SEU effects caused by alpha particle radiation. Unavoidable atmospheric neutrons remain the primary cause for SEU effects today. Soft errors are random and happen according to a probability related to energy levels, flux, and cell susceptibility. Altera has been studying the effects of SEUs on its devices for many process generations and has built up extensive experience in both the reduction of soft-error rates through SEU-optimized physical layout and process technology, and in soft-error mitigation techniques. Altera introduced the industry's first automatic cyclical redundancy check (CRC) and removed the extra logic and complexity requirements common to other error checking solutions. Device families are all tested for SEU behavior and performance using facilities such as Los Alamos Weapons Neutron Research (WNR) using standard test procedures defined by JEDEC's JESD-89 spec. SEU testing of FPGAs at Los Alamos Neutron Science Center (LANSCE) has revealed the following results: No SEU errors have been observed in hard CRC circuit and I/O registers for all products, other than Stratix 10. There is a Mean Time Between Functional Interrupt (MTBFI) of hundreds of years, even for very large, high-density FPGAs. Stratix® series, Arria® GX series, and Cyclone® series of FPGA families feature built-in dedicated hard circuitry to continually and automatically check CRC at no extra cost. For products manufactured on 28 nm process technology and subsequent process nodes, Altera has implemented CRAM upset bit correction (scrubbing) in addition to enhanced CRAM bit upset detection and correction. You can easily set up the CRC checker through the Quartus® Prime design software. For more information regarding other mitigation techniques and for further details about SEU testing of FPGA devices, please contact your local Altera sales representative or distributor. text_link_content Documentation Documentation Current Devices Mature Devices Legacy (Obsolete) Devices IP and Software Products Agilex™ 7 SEU Mitigation User Guide Agilex™ 5 SEU Mitigation User Guide Agilex™ 3 SEU Mitigation User Guide Stratix® 10 SEU Mitigation User Guide Arria® 10 SEU Mitigation Techniques AN 737: SEU Detection and Recovery in Arria® 10 Devices Cyclone® 10 GX Device Design Guidelines MAX® 10 SEU Mitigation and Configuration Error Detection Arria® V Device Handbook: Volume 1: Device Interfaces and Integration Cyclone® V Device Handbook: Volume 1: Device Interfaces and Integration SEU Mitigation in Cyclone® IV Devices, Cyclone® IV Device Handbook Stratix® V Device Handbook: Volume 1: Device Interfaces and Integration SEU Mitigation in Stratix® IV Devices, Stratix® IV Device Handbook SEU mitigation in Arria® II devices Advanced SEU Detection FPGA IP User Guide AN 866: Mitigating and Debugging Single Event Upsets in Quartus® Prime Standard Edition four_col_split_table Get additional support for Agilex™ 7 System Architecture , Agilex™ 5 System Architecture , and the Agilex™ 3 System Architecture , step-by-step guided journeys for standard development flows surfacing the key critical resources and documentation. For other devices, search the Device and Product Support Collections. text_link_content