Why are the following errors seen when I try to simulate the PCIe Avalon-MM Root Port configuration? - Why are the following errors seen when I try to simulate the PCIe Avalon-MM Root Port configuration? Description Due to a bug in Quartus® II software versions v12.1SP1 and earlier, the auto-generated ModelSim® setup script, msim_setup.tcl, produces errors of the format shown below when using Stratix® V or Arria® V GZ Hard IP Core for PCI Express® IP configured as an Avalon® Memory-Mapped (Avalon-MM) Root Port. These errors are observed in ModelSim when using the setup script located in the following directory: <Qsys name>\simulation\mentor\msim_setup.tcl # ** Error: (vopt-7) Failed to open info file "pcie_sv_hip_avmm_0/_info" in read mode. # No such file or directory. (errno = ENOENT) # ** Error: ./..//submodules/altpcie_sv_hip_avmm_hwtcl.v(2354): Module 'altpcietb_bfm_log_common' is not defined. # ** Error: (vopt-7) Failed to open info file "pcie_sv_hip_avmm_0/_info" in read mode. # No such file or directory. (errno = ENOENT) # ** Error: ./..//submodules/altpcie_sv_hip_avmm_hwtcl.v(2355): Module 'altpcietb_bfm_req_intf_common' is not defined. # ** Error: (vopt-7) Failed to open info file "pcie_sv_hip_avmm_0/_info" in read mode. # No such file or directory. (errno = ENOENT) # ** Error: ./..//submodules/altpcie_sv_hip_avmm_hwtcl.v(2356): Module 'altpcietb_bfm_shmem_common' is not defined. # ** Error: (vopt-7) Failed to open info file "pcie_sv_hip_avmm_0/_info" in read mode. # No such file or directory. (errno = ENOENT) # ** Error: ./..//submodules/altpcie_sv_hip_avmm_hwtcl.v(2357): Module 'altpcietb_ltssm_mon' is not defined. # Optimization failed # Error loading design Resolution The issue is only observed with the standalone IP simulation scripts. The Auto-Generated full testbench works correctly. As a workaround remove the four lines 2354 to 2357 shown below found in the file altpcie_sv_hip_avmm_hwtcl.v altpcietb_bfm_log_common bfm_log_common ( .dummy_out (bfm_log_common_dummy_out)); altpcietb_bfm_req_intf_common bfm_req_intf_common ( .dummy_out (bfm_req_intf_common_dummy_out)); altpcietb_bfm_shmem_common bfm_shmem_common ( .dummy_out (bfm_shmem_common_dummy_out)); altpcietb_ltssm_mon ltssm_mon ( .dummy_out (ltssm_dummy_out), .ep_ltssm (5\'h0), .rp_clk (sim_pipe_pclk_out), .rp_ltssm (ltssmstate), .rstn (npor)); This issue will be fixed in a future release of the Quartus® II software. Custom Fields values: ['novalue'] Troubleshooting 104986 False ['Arria® V Hard IP for PCI Express IP'] ['novalue'] novalue novalue ['Arria® V GZ FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']