What is the state of HPS GPIO on Intel® Cyclone® V SoC and Arria® V SoC devices during cold reset? - What is the state of HPS GPIO on Intel® Cyclone® V SoC and Arria® V SoC devices during cold reset? Description Hard Processor System(HPS) GPIO on Intel® Cyclone® V SoC and Arria® V SoC devices are in the default state during cold reset. The default state of I/O’s on the HPS GPIO Controller/Module is input. HPS I/O is configured as GPIO when the HPS user pin mapping is applied by the Pre-loader. Resolution This information has been added to the 20.1 release of the Intel® Cyclone® V/Arria® V Hard Processor System Technical Reference Manual. Custom Fields values: ['novalue'] Troubleshooting 589483; 1507192358 False ['GPIO IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.1 18.1 ['Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA'] ['novalue'] ['novalue'] ['novalue']