Quartus 21.1 HPS DDR3 SDRAM Compile Error - Quartus 21.1 HPS DDR3 SDRAM Compile Error I get errors when compiling my CycloneV HPS using DDR3 SDRAM IP with UniPhy. The project compiled well under Quartus 18.1 After correctly installing WLS using Ubuntu, updating ubuntu and apt-installing packages wls, make and dos2unix, I succeeded to upgrade to Quartus 20.1, but upgrading to Quartus 21.1 ist still a problem. I already verified the location of my temp drive to be local, which I read in another post. The error message is: Error: border: Error during execution of script generate_hps_sdram.tcl: seq: Error during execution of "{C:/eda/intelfpga/21.1/quartus/../nios2eds/Nios II Command Shell.bat} make all 2>> stderr.txt": child process exited abnormally Error: border: Error during execution of script generate_hps_sdram.tcl: seq: Execution of command "{C:/eda/intelfpga/21.1/quartus/../nios2eds/Nios II Command Shell.bat} make all 2>> stderr.txt" failed Error: border: Error during execution of script generate_hps_sdram.tcl: seq: /mnt/c/eda/intelfpga/21.1/quartus/bin64/uniphy_mcc.exe -ac_code sequencer_mc/ac_rom.s -inst_code sequencer_mc/inst_rom.s -ac_rom ../hps_AC_ROM.hex -inst_rom ../hps_inst_ROM.hex -header sequencer/sequencer_auto.h -vheader ../sequencer_auto_h.sv -ac_rom_init sequencer/sequencer_auto_ac_init.c -inst_rom_init sequencer/sequencer_auto_inst_init.c -DAC_ROM_USER_ADD_0=0_0000_0000_0000 -DAC_ROM_USER_ADD_1=0_0000_0000_1000 -DAC_ROM_MR0=0001000100001 -DAC_ROM_MR0_CALIB= -DAC_ROM_MR0_DLL_RESET=0001100100000 -DAC_ROM_MR1=0000000000000 -DAC_ROM_MR1_OCD_ENABLE= -DAC_ROM_MR2=0000001000000 -DAC_ROM_MR3=0000000000000 -DAC_ROM_MR0_MIRR=0001001000001 -DAC_ROM_MR0_DLL_RESET_MIRR=0001011000000 -DAC_ROM_MR1_MIRR=0000000000000 -DAC_ROM_MR2_MIRR=0000000100000 -DAC_ROM_MR3_MIRR=0000000000000 -DQUARTER_RATE=0 -DHALF_RATE=0 -DFULL_RATE=1 -DNON_DES_CAL=0 -DAP_MODE=0 -DGUARANTEED_READ_BRINGUP_TEST=0 -DMEM_ADDR_WIDTH=13 -DHARD_PHY=1 Error: border: Error during execution of script generate_hps_sdram.tcl: seq: UniPHY Sequencer Microcode Compiler Error: border: Error during execution of script generate_hps_sdram.tcl: seq: Copyright (C) 2021 Intel Corporation. All rights reserved. Error: border: Error during execution of script generate_hps_sdram.tcl: seq: Info: Reading sequencer_mc/ac_rom.s ... Error: border: Error during execution of script generate_hps_sdram.tcl: seq: Info: Reading sequencer_mc/inst_rom.s ... Error: border: Error during execution of script generate_hps_sdram.tcl: seq: Info: Writing ../hps_AC_ROM.hex ... Error: border: Error during execution of script generate_hps_sdram.tcl: seq: Info: Writing ../hps_inst_ROM.hex ... Error: border: Error during execution of script generate_hps_sdram.tcl: seq: Info: Writing sequencer/sequencer_auto_ac_init.c ... Error: border: Error during execution of script generate_hps_sdram.tcl: seq: child process exited abnormally Error: border: Error during execution of script generate_hps_sdram.tcl: Generation stopped, 3 or more modules remaining Error: border: Execution of script generate_hps_sdram.tcl failed Error: border: 2022.01.26.09:55:09 Info: Error: border: ******************************************************************************************************************** Error: border: Error: border: Use qsys-generate for a simpler command-line interface for generating IP. Error: border: Error: border: Run ip-generate with switch --remove-qsys-generate-warning to prevent this notice from appearing in subsequent runs. Error: border: Error: border: ******************************************************************************************************************** Error: border: 2022.01.26.09:55:15 Warning: Ignored parameter assignment device=5CSEMA6U23I7 Error: border: 2022.01.26.09:55:15 Warning: Ignored parameter assignment extended_family_support=true Error: border: 2022.01.26.09:55:25 Warning: hps_sdram: ODT is disabled. Enabling ODT (Mode Register 1) may improve signal integrity Error: border: 2022.01.26.09:55:25 Warning: hps_sdram: 'Quick' simulation modes are NOT timing accurate. Some simulation memory models may issue warnings or errors Error: border: 2022.01.26.09:55:25 Warning: hps_sdram.seq: This module has no ports or interfaces Error: border: 2022.01.26.09:55:25 Warning: hps_sdram.c0: ODT is disabled. Enabling ODT (Mode Register 1) may improve signal integrity Error: border: 2022.01.26.09:55:25 Warning: hps_sdram.p0: p0.scc must be exported, or connected to a matching conduit. Error: border: 2022.01.26.09:55:25 Warning: hps_sdram.as: as.afi_init_cal_req must be exported, or connected to a matching conduit. Error: border: 2022.01.26.09:55:25 Warning: hps_sdram.as: as.tracking must be exported, or connected to a matching conduit. Error: border: 2022.01.26.09:55:25 Warning: hps_sdram.c0: c0.status must be exported, or connected to a matching conduit. Error: border: 2022.01.26.09:55:25 Warning: hps_sdram.p0: p0.avl must be connected to an Avalon-MM master Error: border: 2022.01.26.09:55:25 Info: hps_sdram: Generating altera_mem_if_hps_emif "hps_sdram" for QUARTUS_SYNTH Error: border: 2022.01.26.09:55:31 Info: pll: "hps_sdram" instantiated altera_mem_if_hps_pll "pll" Error: border: 2022.01.26.09:55:31 Info: p0: Generating clock pair generator Error: border: 2022.01.26.09:55:33 Info: p0: Generating hps_sdram_p0_altdqdqs Error: border: 2022.01.26.09:55:45 Info: p0: Error: border: 2022.01.26.09:55:45 Info: p0: ***************************** Error: border: 2022.01.26.09:55:45 Info: p0: Error: border: 2022.01.26.09:55:45 Info: p0: Remember to run the hps_sdram_p0_pin_assignments.tcl Error: border: 2022.01.26.09:55:45 Info: p0: script after running Synthesis and before Fitting. Error: border: 2022.01.26.09:55:45 Info: p0: Error: border: 2022.01.26.09:55:45 Info: p0: ***************************** Error: border: 2022.01.26.09:55:45 Info: p0: Error: border: 2022.01.26.09:55:45 Info: p0: "hps_sdram" instantiated altera_mem_if_ddr3_hard_phy_core "p0" Error: border: 2022.01.26.09:55:49 Error: seq: Error during execution of "{C:/eda/intelfpga/21.1/quartus/../nios2eds/Nios II Command Shell.bat} make all 2>> stderr.txt": child process exited abnormally Error: border: 2022.01.26.09:55:49 Error: seq: Execution of command "{C:/eda/intelfpga/21.1/quartus/../nios2eds/Nios II Command Shell.bat} make all 2>> stderr.txt" failed Error: border: 2022.01.26.09:55:49 Error: seq: /mnt/c/eda/intelfpga/21.1/quartus/bin64/uniphy_mcc.exe -ac_code sequencer_mc/ac_rom.s -inst_code sequencer_mc/inst_rom.s -ac_rom ../hps_AC_ROM.hex -inst_rom ../hps_inst_ROM.hex -header sequencer/sequencer_auto.h -vheader ../sequencer_auto_h.sv -ac_rom_init sequencer/sequencer_auto_ac_init.c -inst_rom_init sequencer/sequencer_auto_inst_init.c -DAC_ROM_USER_ADD_0=0_0000_0000_0000 -DAC_ROM_USER_ADD_1=0_0000_0000_1000 -DAC_ROM_MR0=0001000100001 -DAC_ROM_MR0_CALIB= -DAC_ROM_MR0_DLL_RESET=0001100100000 -DAC_ROM_MR1=0000000000000 -DAC_ROM_MR1_OCD_ENABLE= -DAC_ROM_MR2=0000001000000 -DAC_ROM_MR3=0000000000000 -DAC_ROM_MR0_MIRR=0001001000001 -DAC_ROM_MR0_DLL_RESET_MIRR=0001011000000 -DAC_ROM_MR1_MIRR=0000000000000 -DAC_ROM_MR2_MIRR=0000000100000 -DAC_ROM_MR3_MIRR=0000000000000 -DQUARTER_RATE=0 -DHALF_RATE=0 -DFULL_RATE=1 -DNON_DES_CAL=0 -DAP_MODE=0 -DGUARANTEED_READ_BRINGUP_TEST=0 -DMEM_ADDR_WIDTH=13 -DHARD_PHY=1 Error: border: 2022.01.26.09:55:49 Error: seq: UniPHY Sequencer Microcode Compiler Error: border: 2022.01.26.09:55:49 Error: seq: Copyright (C) 2021 Intel Corporation. All rights reserved. Error: border: 2022.01.26.09:55:49 Error: seq: Info: Reading sequencer_mc/ac_rom.s ... Error: border: 2022.01.26.09:55:49 Error: seq: Info: Reading sequencer_mc/inst_rom.s ... Error: border: 2022.01.26.09:55:49 Error: seq: Info: Writing ../hps_AC_ROM.hex ... Error: border: 2022.01.26.09:55:49 Error: seq: Info: Writing ../hps_inst_ROM.hex ... Error: border: 2022.01.26.09:55:49 Error: seq: Info: Writing sequencer/sequencer_auto_ac_init.c ... Error: border: 2022.01.26.09:55:49 Error: seq: child process exited abnormally Error: border: 2022.01.26.09:55:49 Info: seq: "hps_sdram" instantiated altera_mem_if_hhp_ddr3_qseq "seq" Error: border: 2022.01.26.09:55:49 Error: Generation stopped, 3 or more modules remaining Error: border: 2022.01.26.09:55:49 Info: hps_sdram: Done "hps_sdram" with 7 modules, 38 files Info: border: "hps_io" instantiated altera_interface_generator "border" Error: Generation stopped, 1 or more modules remaining Info: e090_hps: Done "e090_hps" with 54 modules, 131 files Error: qsys-generate failed with exit code 1: 60 Errors, 5 Warnings Info: Finished: Create HDL design files for synthesis Any help would be appreciated. Regards, Stefan Replies: Re: Quartus 21.1 HPS DDR3 SDRAM Compile Error Hi sphilipp , I wasn't aware that the same patch works as well for lite version. Good to know that from you, thanks for the info! I will close this thread for now. Thanks. Regards, Aik Eu Replies: Re: Quartus 21.1 HPS DDR3 SDRAM Compile Error Hi All, Good news for all who encounter the same problem: I just tested, the same patch works well on the Quartus 21.1 Lite version, too! Greetings, Stefan Replies: Re: Quartus 21.1 HPS DDR3 SDRAM Compile Error Hi sphilipp , I dont think there is a patch for the lite-version. Thanks. Regards, Aik Eu Replies: Re: Quartus 21.1 HPS DDR3 SDRAM Compile Error Hi Aik Eu, Thank you, your patch worked fine for me, using version 21.1 Standard! Is there a patch for Lite-version, too? best regards, Stefan Replies: Re: Quartus 21.1 HPS DDR3 SDRAM Compile Error Hi sphilipp , The patches provided in this KDB may help: https://www.intel.com/content/www/us/en/support/programmable/articles/000088789.html?wapkw=Why%20do%20I%20get%20an%20error%20in%20Platform%20Designer%20during%20the%20Generate%20HDL%20process%20for%20systems Thanks. Regards, Aik Eu - 2022-01-26