Internal Error: Programmable pre-emphasis option is set to 1 for pin dut_mem_mem_par(0)~pad, but setting is not supported by I/O standard SSTL-12 with Slew Rate 0 - Internal Error: Programmable pre-emphasis option is set to 1 for pin dut_mem_mem_par(0)~pad, but setting is not supported by I/O standard SSTL-12 with Slew Rate 0 Description You may see an error similar to the one shown below when compiling the DDR4 IP in the Quartus® Prime Software versions 18.0 and 18.0.1. Internal Error: Programmable pre-emphasis option is set to 1 for pin <signal_name> ~pad, but setting is not supported by I/O standard SSTL-12 with Slew Rate 0 The <signal_name> is one of the DDR4 address/command signals. Resolution In the Quartus® Prime project .QSF file, enter the following assignment: set_instance_assignment -name PROGRAMMABLE_PREEMPHASIS 0 -to <signal_name> Add a similar assignment for each affected DDR4 signal. Custom Fields values: ['novalue'] Troubleshooting FB: 568061; False ['External Memory Interfaces Arria® 10 FPGA IP', 'External Memory Interfaces Stratix® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro', 'FPGA Dev Tools Quartus® Prime Software Standard'] 18.1 18.0 ['Arria® 10 FPGAs and SoCs', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']