Arria® 10 GX FPGA Overview - FPGAs enabled with up to 96 full-duplex transceivers with data rates up to 17.4 Gbps chip-to-chip, 12.5 Gbps backplane, and up to 1,150K equivalent LEs. Product Pages Industrial Security Medical Overview At 20nm, Arria 10 GX FPGAs deliver high performance, supporting data rates up to 17.4 Gbps chip-to-chip, 12.5 Gbps backplane, and up to 1,150K equivalent LEs. Arria 10 GX FPGA Product Table Benefits Delivers a balance of logic density, DSP performance, and transceiver capabilities to support a wide range of communications, broadcast, and industrial applications requiring flexible signal processing and high-speed data paths. High-Speed Transceivers and DSP Processing Provides extensive DSP blocks and memory resources to accelerate complex algorithms, filtering, and real-time signal processing workloads in diverse system designs. Flexible Embedded Processing Options Offers configurable I/O and protocol support, making it adaptable for multi-protocol environments where system versatility and efficient resource utilization are important. Power-Efficient Performance for Complex Designs Key Features Serial transceivers are highly versatile, offering efficient high-speed data transmission with low latency and minimal power consumption while supporting a range of IP protocols. High-Bandwidth and Low-Latency Transceivers DSP blocks with integrated floating-point capabilities provide high-performance computing and can deliver up to 1.5 TeraFLOPs of processing power. Enhanced Floating-Point Capabilities This device offers seven 32-bit DDR4 memory interfaces operating at up to 2,400 Mbps, delivering increased external memory bandwidth that simplifies design and optimizes memory controller usage. Increased External Memory Bandwidth Applications Industrial Medical Security Dev Kits, IP, Example Designs & Software Get Started: Development Kits, IP, Example Designs and Software Dev Kit Arria 10 GX FPGA Development Kit PCIe 3.0 and DDR4 prototyping for mid-range system designs. IP Multi-Rate Ethernet PHY FPGA IP This IP allows dynamic reconfiguration across all Ethernet rates from 10M, 100M, 1G, 2.5G, 5G, and 10G. Nios V Processors By leveraging the RISC-V instruction set architecture (ISA), the Nios V processors offer scalable solutions that enable a spectrum of applications ranging from simple embedded systems to complex, high-performance applications. Example Designs FPGA Developer Site GitHub site that provides a single location for developers to find and use Altera example designs, software, drivers, and associated collateral. Example Design Store This site offers essential FPGA developer resources—including example designs, documentation, and software tools—to accelerate your design process and reduce time to production. Software Quartus® Prime Pro Edition Design Software Quartus® Prime Standard Edition Design Software Documentations Documents Documentations Arria 10 FPGA Product Table Arria 10 Documentation Quick Links Arria 10 GX FPGA Device Overview Arria 10 FPGA Datasheet Support Resources Arria® 10 GX FPGA