Why does the F-Tile Ethernet Multirate Intel® FPGA IP 100GE-4 profile with PTP enabled and FEC not enabled, fail to assert the o_p0/p1/p2/p3_rx_ptp_ready in simulation? - Why does the F-Tile Ethernet Multirate Intel® FPGA IP 100GE-4 profile with PTP enabled and FEC not enabled, fail to assert the o_p0/p1/p2/p3_rx_ptp_ready in simulation? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.1, an F-Tile Ethernet Multirate Intel® FPGA IP 100GE-4 profile with PTP enabled and FEC not enabled will not function correctly, and the rx_ptp_ready port will fail to assert. Resolution No workaround for this problem exists in 22.1. This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Errata 15010973682 False ['Interfaces'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.2 22.1 ['Agilex™ 7 FPGA I-Series'] ['novalue'] ['novalue'] ['novalue']