HyperRAM Controller (Silicon Proven IP for Altera Devices) - The HyperRAM Controller supports Winbond’s HyperBus-based HyperRAM devices used in IoT, automotive, and industrial SoCs. Written in tech-agnostic Verilog RTL, it supports major simulation and… Mobiveil, Inc.(a GlobalLogic company) is a fast-growing technology company headquartered in Santa Clara, California, specializing in Silicon Intellectual Properties (SIP), application platforms, and… Arria® II GX FPGA Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST SoC FPGA Arria® V SX SoC FPGA Cyclone® III FPGA Cyclone® IV E FPGA Cyclone® IV GX FPGA Cyclone® V E FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE SoC FPGA Cyclone® V ST SoC FPGA Cyclone® V SX SoC FPGA Intel Agilex® 3 FPGAs and SoC FPGAs C-Series Intel Agilex® 5 FPGAs and SoC FPGAs D-Series Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Intel Agilex® 7 FPGAs and SoC FPGAs M-Series Intel Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series Intel® Arria® 10 GT FPGA Intel® Arria® 10 GX FPGA Intel® Arria® 10 SX SoC FPGA Intel® Cyclone® 10 GX FPGA Intel® Cyclone® 10 LP FPGA Intel® MAX® 10 FPGA Intel® Stratix® 10 AX SoC FPGA Intel® Stratix® 10 DX FPGA Intel® Stratix® 10 GX FPGA Intel® Stratix® 10 SX SoC FPGA Intel® Stratix® 10 TX FPGA Intel® eASIC™ N3X Devices Intel® eASIC™ N3XS Devices Stratix® III FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Stratix® V GS FPGA Stratix® V GX FPGA HyperRAM™ controller IP for Winbond devices (x8/x16) with AXI memory-mapped access, APB control, RWDS strobes, linear/wrap/hybrid bursts, low-power modes, and device clocks up to 250 MHz for high bandwidth, low-pin designs. Technology-independent, system-validated RTL that enables smooth integration of Winbond HyperRAM into new-gen SoCs. Supports 8-bit and 16-bit data buses, RWDS read/write data strobes, AXI4 memory-mapped interface for data, APB for control, and linear, wrap, and hybrid bursts. Power features (deep power-down, hybrid sleep) are exposed via control/status registers. Delivered with SV/UVM testbench, behavioral PHY model, and a validated FPGA PHY reference design for rapid bring-up. Consumer Industrial Transportation Wireless AI/HPC (DCO) CDNs (DCO) IaaS/PaaS (DCO) Networking (DCO) Storage (DCO) HyperRAM Controller (Silicon Proven IP for Altera Devices) Key Features Compatible with W958D6NW, W958D6NKY, W956x8MBYA, W955D8MBYA HyperRAMTM devices from Winbond. Offering Brief No Yes No No Encrypted Verilog Verilog Arria® II GX FPGA Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST SoC FPGA Arria® V SX SoC FPGA Cyclone® III FPGA Cyclone® IV E FPGA Cyclone® IV GX FPGA Cyclone® V E FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE SoC FPGA Cyclone® V ST SoC FPGA Cyclone® V SX SoC FPGA Intel Agilex® 3 FPGAs and SoC FPGAs C-Series Intel Agilex® 5 FPGAs and SoC FPGAs D-Series Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Intel Agilex® 7 FPGAs and SoC FPGAs M-Series Intel Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series Intel® Arria® 10 GT FPGA Intel® Arria® 10 GX FPGA Intel® Arria® 10 SX SoC FPGA Intel® Cyclone® 10 GX FPGA Intel® Cyclone® 10 LP FPGA Intel® MAX® 10 FPGA Intel® Stratix® 10 AX SoC FPGA Intel® Stratix® 10 DX FPGA Intel® Stratix® 10 GX FPGA Intel® Stratix® 10 SX SoC FPGA Intel® Stratix® 10 TX FPGA Intel® eASIC™ N3X Devices Intel® eASIC™ N3XS Devices Stratix® III FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Stratix® V GS FPGA Stratix® V GX FPGA Yes Yes 24.3.1 Offering Brief Production a1JUi0000049UJtMAM What's Included RTL Code Ordering Information NA Direct a1JUi0000049UJtMAM Production Intellectual Property (IP) a1MUi00000BO8shMAD a1MUi00000BO8shMAD Select 2025-10-24T15:57:34.000+0000 The HyperRAM Controller supports Winbond’s HyperBus-based HyperRAM devices used in IoT, automotive, and industrial SoCs. Written in tech-agnostic Verilog RTL, it supports major simulation and synthesis tools. The controller ensures seamless memory integration with minimal resource usage. Partner Solutions