VHDL Simulation May Fail for PHYLite IP Core when using Modelsim or Questasim Simulators - VHDL Simulation May Fail for PHYLite IP Core when using Modelsim or Questasim Simulators Description VHDL simulation may fail for PHYLite IP core. This issue is specific to VHDL simulation and affects the PHYLite IP core in Quartus II software version 14.1. Resolution Use version 10.3e of the Modelsim or Questasim simulator or turn off optimization in the simulator by using the -novopt flag. This issue will be fixed in a future version of the Quartus II software. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 14.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']