Can reconfg_clk port of reconfiguration module be drived by ref_clk? - Can reconfg_clk port of reconfiguration module be drived by ref_clk? Description If you use the Stratix V Hard IP with CVP, reconfig_clk is required to be the same as refclk for CVP. For non-CVP, it can be derived from a separated free running clock source. Resolution Custom Fields values: ['novalue'] Troubleshooting novalue False ['PCI Express'] ['novalue'] novalue novalue ['Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']