10m50 development board SDRAM implementing. - 10m50 development board SDRAM implementing. hi everyone, i am new at FPGA world. I am using 10m50daf484c6ges development board. i want to run large codes in nios II, so i need to use SDRAM but i could not implement sdram. i tried all of the ways where i find in internet but i couldn't be successful. can anybody help me? Replies: Re: 10m50 development board SDRAM implementing. Thank you again Sir! finally i could communicate with the sdram. Problem was the version of Quartus. i complied the same project on quartus II V.15.0 web edition then i worked. Replies: Re: 10m50 development board SDRAM implementing. Great Thanks! i will try these ways and i will tell you the result. Replies: Re: 10m50 development board SDRAM implementing. Hi, Upon checking in design store, there is a Intel MAX 10 FPGA Development Kit with DDR3 UniPHY tutorial: https://fpgacloud.intel.com/devstore/platform/15.0/Standard/design-example-max10-10-ddr3-300mhz-uniphy-half-rate-x24/ But I found that the project build in Quartus Prime v15.0 version, it might be some IP not compatible to use in Quartus Prime Lite v18.1. You can try to download and look into the design. There are some tutorials for Intel MAX 10 Development Kit DDR3: https://fpgacloud.intel.com/devstore/?page=1&search=ddr3 For more information in MAX 10 External Memory Interface, you may need to refer the document as below: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_emi.pdf Thanks Replies: Re: 10m50 development board SDRAM implementing. I am using Intel MAX 10 FPGA Development Kit which has dual ethernet port. And i am using Quartus Prime 18.1 lite edition with NIOS II eclipse Mars.2 version 4.5.2 is there any tutorial or example for adding sdram on this development kit? can i add sdram with lite edition quartus? And which IP core do I need to use for communication with sdram, sdram controller or ddr3 sdram controller with UNIPHY? Thank you for your support! Replies: Re: 10m50 development board SDRAM implementing. Hi, May I know the information as below: 1. Are you using Intel MAX 10 FPGA Developmet Kit as I can found the information for "10m50daf484c6ges development board" in link below: https://www.intel.com/content/www/us/en/programmable/products/fpga/max-series/max-10/design-tools.html 2. The Nios II software version used Could you provide me the full design file for further investigate/ Thanks