10G/100G MAC/PCS IP - The 10G/100G MAC/PCS IP Core is a fully integrated and configurable solution that combines the Ethernet Media Access Control (MAC) and Physical Coding Sublayer (PCS) functionality into a single, high… Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Arria® 10 GT FPGA Arria® 10 GX FPGA Arria® 10 SX FPGA Stratix® 10 AX FPGA Stratix® 10 DX FPGA Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA The 10G/100G MAC/PCS IP Core is a fully integrated and configurable solution that combines the Ethernet Media Access Control (MAC) and Physical Coding Sublayer (PCS) functionality into a single, high-performance IP block. Designed in compliance with IEEE 802.3ae (10G) and IEEE 802.3ba (100G) standards, this IP core is ideal for implementing high-speed Ethernet solutions in FPGAs and ASICs for data center, telecom, AI, and networking infrastructure applications. The IP core handles Ethernet frame encapsulation, error checking, flow control, lane alignment, and 64b/66b encoding/decoding — all with deterministic performance and minimal resource overhead. Access Aerospace ASIC Proto Data Center Cloud (Public, Private, Hybrid) Data Center OEM (IHV, ISV, SI, VAR) Defense Industrial Test Wireless 10G/100G MAC/PCS IP Key Features IEEE 802.3ae and 802.3ba Compliant: Fully compliant with 10G and 100G Ethernet MAC and PCS specifications. Offering Brief No No No Yes Encrypted Verilog Verilog Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Arria® 10 GT FPGA Arria® 10 GX FPGA Arria® 10 SX FPGA Stratix® 10 AX FPGA Stratix® 10 DX FPGA Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA Yes Yes 24.3.1 Offering Brief Production a1JUi000007bEG5MAM What's Included Synthesizable RTL source code Ordering Information QBL-IP-MAC/PCS-10G/100G a1JUi000007bEG5MAM Production Intellectual Property (IP) a1MUi00000BOWpkMAH a1MUi00000BOWpkMAH Member 2026-03-18T22:18:25.000+0000 The 10G/100G MAC/PCS IP Core is a fully integrated and configurable solution that combines the Ethernet Media Access Control (MAC) and Physical Coding Sublayer (PCS) functionality into a single, high-performance IP block. Partner Solutions - 2026-04-02
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