Why is there an empty histogram test error or accuracy error in the F-Tile transceivers when running 50G ethernet with PTP enabled both using FEC and no FEC conditions? - Why is there an empty histogram test error or accuracy error in the F-Tile transceivers when running 50G ethernet with PTP enabled both using FEC and no FEC conditions? Description The vector synchronizer does not pass input values to the output if they remain the same. When a data path reset without resetting the configuration space is performed, and the input value remains the same, the output remains stuck at reset values, causing the vector synchronizer not to pass input values to the output. The output not receiving the required value triggered the pulse “async_pulse” at the wrong time, resulting in a PTP error accuracy of up to 400 sec. Resolution The workaround is to fix the user flow by changing the Control Word position value by subtracting 1 from this value in every iteration. This problem will be fixed in a future release of Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 16023316362 False ['F-Tile PMA/FEC Direct PHY IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.3.1 23.4 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']