Why does configuration occasionally fail on Agilex® 7 FPGA devices, leaving the device stuck in the CONFIG state when using a JIC file generated with Quartus® Prime Pro Edition version 23.2 or later? - Why does configuration occasionally fail on Agilex® 7 FPGA devices, leaving the device stuck in the CONFIG state when using a JIC file generated with Quartus® Prime Pro Edition version 23.2 or later? Description You may encounter intermittent configuration failures on the Agilex® 7 FPGA device, when using JIC file generated with Quartus® Prime Pro Edition software version 23.2 and later. When the issues occurs, the device remain in the CONFIG state, while both the conf_done and init_done is remain low. In addition, no error location and error info as shown below. Resolution To work around this issues: Power cycle the board or toggle nCONFIG to reconfigure the FPGA. Patches are also available to fix this problem for the following Quartus Prime Pro Versions: 23.2 23.3 This problem is fixed starting from Quartus Prime Pro Edition Version 25.1.1 and later. Additional Information Note: If you can tolerate occasional errors that are unlikely to recur after reconfiguration, no further action is necessary . If you require zero-error tolerance —even for rare occurrences that may be resolved through reconfiguration or toggling nCONFIG —a patch request is recommended . This fix does not require recompilation of the design. You only need to reconvert the .sof file to .jic . Add any additional information on the topic. Related Articles Why does configuration fail intermittently when using a JIC file generated with Quartus® Prime Pro Edition version 23.2 and later on Agilex® 7 FPGA devices, resulting in Major Error Code 0x0000F004 and Minor Error Code 0x00000001? | Altera Community - 339342 Custom Fields values: Troubleshooting QS-51694 novalue ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 23.2 ['Agilex® 7 FPGAs and SoCs']