How do I enable Intel® Arria®10, Intel Cyclone® 10, and Intel Stratix® 10 device Transceiver Toolkit capability in the Native PHY IP? - How do I enable Intel® Arria®10, Intel Cyclone® 10, and Intel Stratix® 10 device Transceiver Toolkit capability in the Native PHY IP? Description To enable Intel ® Arria ® 10, Intel Cyclone ® 10, and Intel Stratix ® 10 device Transceiver Toolkit capability in the Native PHY intellectual property (IP) you must select the following options on the “Dynamic Reconfiguration” tab of the TX PLL and Native PHY IP. Resolution Enable these options in the TX PLL and Native PHY IP: Enable dynamic reconfiguration Native PHY Debug Master Endpoint (NPDME) Enable capability registers Enable control and status registers Enable PRBS soft accumulators Custom Fields values: ['novalue'] Troubleshooting FB: 526530; False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 17.1.1 ['Arria® 10 FPGAs and SoCs', 'Cyclone® 10 GX FPGA', 'Programmable Logic Devices', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']