Why is the dangling signal with perserve_for_debug attribute still optimized away after compilation? - Why is the dangling signal with perserve_for_debug attribute still optimized away after compilation? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software v22.3 and earlier, you might see the dangling signal is optimized away, although it has preserve_for_debug synthesis attribute. Resolution To work around this problem, connect the dangling signal to the top-level pin to avoid synthesis optimization. This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 22.4. Custom Fields values: ['novalue'] Troubleshooting 14016440424 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.4 21.1 ['Agilex™ 7 FPGAs and SoCs', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']