How do I access the Intel® Stratix® 10 Hard IP for PCI Express* IP Core configuration space registers without the Local Management Interface? - How do I access the Intel® Stratix® 10 Hard IP for PCI Express* IP Core configuration space registers without the Local Management Interface? Description Local Management Interface (LMI) is not supported in the Intel® Stratix® 10 Hard IP for PCI Express* IP Core. You can access the Intel® Stratix® 10 Hard IP for PCI Express* IP Core configuration space register via the Hard IP Reconfiguration Interface. Resolution To access the Hard IP Reconfiguration block, IP Catalog >> Avalon®-ST Intel® Stratix® 10 Hard IP for PCI Express* OR Avalon®-MM Intel® Stratix® 10 Hard IP for PCI Express*>> "Configuration, Debug and Extension Options" tab >> turn on "Enable hard IP dynamic reconfiguration of PCIe read-only registers". To dynamically modify the value of configuration registers that are read-only at run time, refer to the "Hard IP Reconfiguration" section of the respective user guide. Custom Fields values: ['novalue'] Troubleshooting FB: 506035; False ['Avalon-MM Stratix® 10 Hard IP for PCI Express', 'Avalon-ST Stratix® 10 Hard IP for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 18.0.1 17.1 ['Stratix® 10 GX FPGA', 'Stratix® 10 MX FPGA', 'Stratix® 10 SX FPGA', 'Stratix® 10 TX FPGA'] ['novalue'] ['novalue'] ['novalue']