Why isn't the HPS_nRST(rst_pin_rst_n) driven LOW on cold reset? - Why isn't the HPS_nRST(rst_pin_rst_n) driven LOW on cold reset?
Description The Cyclone ® V and Arria ® V Handbooks incorrectly state that HPS_nRST will be driven on some cold resets. The HPS_nRST (rst_pin_rst_n) signal is only driven on Warm resets. It is not driven on Cold or POR resets. Resolution This documentation problem will be fixed in a future release of the Cyclone V and Arria V Handbooks.
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Troubleshooting
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['Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA']
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['novalue'] - 2021-08-25
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