Why is a floating voltage observed on the 2.5V VCCIO rail during power-up of Cyclone IV GX, Cyclone V, Arria V, Stratix IV or Stratix V devices? - Why is a floating voltage observed on the 2.5V VCCIO rail during power-up of Cyclone IV GX, Cyclone V, Arria V, Stratix IV or Stratix V devices?
Description If a 2.5V VCCIO power rail is shared with VCCH_GXB in Cyclone® IV GX or Cyclone V devices, or VCC_AUX in Arria® V, Cyclone V, Stratix® IV or Stratix V devices, a floating voltage may appear on the 2.5V VCCIO rail. For further details about floating voltages on VCCH_GXB and VCC_AUX, refer to the related solutions. Related Articles Is there any problem if a floating voltage exists on VCCH_GXB before it is ramped in Cyclone V devices? Is there a problem if a floating voltage exists on VCC_AUX before it is ramped in Arria V, Cyclone V, Stratix IV, and Stratix V devices? Are there any problems if a floating voltage exists on the VCCH_GXB supply rail before it is ramped in Cyclone IV GX devices?
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['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® IV GX FPGA', 'Cyclone® V E FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Stratix® IV E FPGA', 'Stratix® IV GT FPGA', 'Stratix® IV GX FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA']
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