Why does my PCI Express endpoint not respond to the Link Disable request from the root complex? - Why does my PCI Express endpoint not respond to the Link Disable request from the root complex? Description You may experience problems commanding the Altera® PCI Express® core to the Link Disable state, when configured as an endpoint. The PCI Express core may transmit a truncated (incorrect length) TS1 message during the transition to Electrical Idle. In simulation, your Root Port BFM may complain about a "TS Ordered set length error". Resolution The workaround at this time is to avoid using this optional feature. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® II GX FPGA', 'Cyclone® IV GX FPGA', 'Stratix® IV GX FPGA'] ['novalue'] ['novalue'] ['novalue']