UVM Fundamentals - Developed for Marvell, now available for the FPGA market. Learn how to verify complex FPGA and SoC FPGA designs. Master all UVM fundamentals with extensive hands-on labs. HandsOn-Training is a premier global provider of high-level technology training and expert design services, specializing in the most advanced sectors of the Hi-Tech industry. Founded by Oren… Intel Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series Intel® Stratix® 10 TX FPGA Intel Agilex® 5 FPGAs and SoC FPGAs D-Series Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Intel® Stratix® 10 GX FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Intel® Stratix® 10 DX FPGA Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel® Stratix® 10 SX SoC FPGA Intel Agilex® 7 FPGAs and SoC FPGAs M-Series Stratix® V GS FPGA Stratix® V GX FPGA Intel® Stratix® 10 AX SoC FPGA Developed for Marvell, now available for the FPGA market. Learn how to verify complex FPGA and SoC FPGA designs. Master all UVM fundamentals with extensive hands-on labs. High-end FPGA designs such as Agilex™ 7 and Agilex™ 9 require intensive verification to decrease time to market. Universal Verification Methodology (UVM) is a standardized methodology for verifying digital designs and SoC. It is built on top of SV language and consists of set of standards, tools, and APIs for design verification. UVM helps companies develop modular, reusable, and scalable test benches that can be deployed across multiple projects. The training introduces the UVM and its structure, then covers the UVM library, reporting mechanism, factory, TLM, configuration database, phases, hierarchy, test and testbench top. Then the training covers how to generate stimulus with sequences and virtual sequences as well as using RAL. Extensive practical labs are integrated during the training to make sure that the participant understand the flow, structure and concept of each verification building block. Aerospace ASIC Proto Consumer Defense Government Medical UVM Fundamentals Key Features Become familiar with UVM structure and UVM library basics. Offering Brief No No No No Intel Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series Intel® Stratix® 10 TX FPGA Intel Agilex® 5 FPGAs and SoC FPGAs D-Series Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Intel® Stratix® 10 GX FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Intel® Stratix® 10 DX FPGA Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel® Stratix® 10 SX SoC FPGA Intel Agilex® 7 FPGAs and SoC FPGAs M-Series Stratix® V GS FPGA Stratix® V GX FPGA Intel® Stratix® 10 AX SoC FPGA No No English Offering Brief Production a1JUi0000049UM1MAM FPGA design and verification FPGA design and verification engineers What's Included a1JUi0000049UM1MAM Course book a1JUi0000049UM1MAM Production Education / Training a1MUi00000BO8swMAD a1MUi00000BO8swMAD Select 2026-02-10T05:23:07.000+0000 Developed for Marvell, now available for the FPGA market. Learn how to verify complex FPGA and SoC FPGA designs. Master all UVM fundamentals with extensive hands-on labs. Partner Solutions