Can I place input differential clock or data pins in an I/O bank not powered by 2.5V VCCIO? - Can I place input differential clock or data pins in an I/O bank not powered by 2.5V VCCIO? Description In Stratix ® V, Arria® V, and Cyclone® V devices, the differential input buffer is powered by VCCPD which must be 2.5-V to support differential inputs. You can choose the VCCIO power supply of the I/O banks as follows - 1.2, 1.25, 1.35, 1.5, or 1.8-V, and set VCCPD power supply of the I/O bank to 2.5-V. The differential input I/O standard is not supported when VCCIO is 3.0-V. Resolution Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V E FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']