Why is my PCI Express Data Link Control and Management State Machine (DLCMSM) stuck in FCInit2? - Why is my PCI Express Data Link Control and Management State Machine (DLCMSM) stuck in FCInit2? Description When simulating the Hard IP for PCI Express® IP core, you may be stuck in the DLCMSM if the test_in signals are floating or uninitialized. A symptom of this problem is that dl_up is not asserted in simulation. Resolution Initialize test_in correctly. For simulation, the Altera-recommended value of test_in is 32\'hA9. For hardware, set test_in to 32\'hA8. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® 10 GX FPGA'] ['novalue'] ['novalue'] ['novalue']