RapidIO II IP Core ios_rd_wr_waitrequest and mnt_s_waitrequest Signals Are Not Held High During Reset - RapidIO II IP Core ios_rd_wr_waitrequest and mnt_s_waitrequest Signals Are Not Held High During Reset Description The Avalon-MM specification recommends that Avalon-MM slave interface waitrequest signals be held high during reset. In addition, the RapidIO II IP core user guide indicates that all of the IP core Avalon-MM waitrequest output signals are held high during reset. However, the IP core holds the ios_rd_wr_waitrequest and mnt_s_waitrequest signals low during reset. Resolution This issue has no workaround. Components that master transactions that target a RapidIO II IP core I/O Avalon-MM slave interface or Maintenance Avalon-MM Slave interface should avoid sending transactions when the RapidIO II IP core is in reset. Custom Fields values: ['novalue'] Troubleshooting novalue True ['Reset'] ['FPGA Dev Tools Quartus II Software'] novalue 12.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']