Why does the Quartus® Prime Pro Edition Software version 24.1 observe 17 clock cycles when using the Generic Serial Flash Interface IP(GSFI IP)? - Why does the Quartus® Prime Pro Edition Software version 24.1 observe 17 clock cycles when using the Generic Serial Flash Interface IP(GSFI IP)? Description This problem is caused by 2 modules in the GSFI IP: the if_ctrl (interface control) module, which is used to interface to the QSPI flash, and the cmd (command) module, which is used to generate the flash command. The additional flash clock only impacts read operations on the flash, which are read data or read register operations. It does not impact write operations. Resolution To workaround this problem, use the following patch in the Quartus® Prime Pro Edition software version 21.4. Quartus® Prime Pro Edition Software v21.4 Solution Patch 0.45 for Windows (.exe) Quartus® Prime Pro Edition Software v21.4 Solution Patch 0.45 for Linux (.run) Readme for Intel® Quartus® Prime Pro Edition Software v21.4 Solution Patch 0.45 (.txt) Custom Fields values: ['novalue'] Troubleshooting 15017614291 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 24.1 ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']