What does the i_txclkdivrate input port in the GTS PMA/FEC Direct PHY IP do when SATA/SAS configuration rules are selected? - What does the i_txclkdivrate input port in the GTS PMA/FEC Direct PHY IP do when SATA/SAS configuration rules are selected? Description Due to a problem in the Quartus® Prime Pro Edition software version 25.3.1, the i_txclkdivrate input port to be unintentionally exposed when SATA/SAS mode is selected via the PMA configuration rules in the GTS PMA/FEC Direct PHY IP. This port does not require user control when operating in SATA/SAS mode. Resolution To work around this problem, you can tie this port to GND (ground) when operating in SATA/SAS mode. This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition software. The port will be removed and will be controlled internally by the GTS PMA/FEC Direct SIP. Custom Fields values: ['novalue'] Troubleshooting 15018470988 novalue ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 25.3.1 ['Agilex™ 3 FPGAs and SoCs', 'Agilex™ 5 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']