Qsys IRQ bridge erroneously inserts clock crossers - Qsys IRQ bridge erroneously inserts clock crossers Description In the hw.tcl for the Interrupt Request (IRQ) Bridge component of the Qsys system integration tool, the following assignment is commented out:#set_interface_property "sender_irq" associatedClock "clk" This error causes the interrupt request (IRQ) bridge to insert clock crossers, but the IRQ receivers and senders are in the same clock domain. Resolution This issue is fixed in the Quartus II software release version 14.0 update 1. For previous releases of the Quartus II software, you must uncomment this assignment. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 14.0.1 14.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']