Are there any problems simulating the ATX PLL Reconfiguration Profile feature using Arria 10 devices? - Are there any problems simulating the ATX PLL Reconfiguration Profile feature using Arria 10 devices? Description Due to a problem in the Quartus® Prime software, the "Enable control and status registers" option in the Arria® 10 ATX PLL IP is not enabled by default which doesn’t allow the profile to be streamed to the new configuration. Resolution This problem has been fixed in Quartus Prime software versions 17.0 and later. For earlier versions of Quartus Prime software, the user should enable the "Enable control and status registers" in the Arria 10 ATX PLL IP. Custom Fields values: ['novalue'] Troubleshooting FB: 430584; False ['Transceiver ATX PLL Arria® 10 Cyclone® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 17.0 16.1 ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']