Why do IBIS models for Stratix V devices have AC and DC endpoint mismatches in the IBIS syntax checker? - Why do IBIS models for Stratix V devices have AC and DC endpoint mismatches in the IBIS syntax checker?
Description Due to a problem in the Quartus® II software versions 11.1 and later, IBIS models for Stratix® V devices generated on a Linux platform may have AC and DC endpoint mismatches in the IBIS syntax checker. Resolution To work around this problem, regenerate the IBIS model with the Quartus II software version 11.1 on a Windows platform This issue is fixed beginning with the Quartus II software version 12.0.
Custom Fields values:
['novalue']
Troubleshooting
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False
['novalue']
['FPGA Dev Tools Quartus II Software']
12.0
11.1
['Stratix® V E FPGA', 'Stratix® V FPGAs', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA']
['novalue']
['novalue']
['novalue'] - 2021-08-25
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