Does the DSPBA support dual write ports? - Does the DSPBA support dual write ports? Description When DSPBA creates a dual-port memory (e.g using sharedMem block), as you can see from below port map, the port A is used as the write port and port B is the read port, where the read port input (“data_b”) is present but not used, it means that the dual write ports is not supported at the moment. PORT MAP ( clocken0 => '1', wren_a => DGains_we_q(0), aclr0 => DGains_dm_reset0, clock0 => clk, address_b => DGains_dm_ab, -- data_b => (others => '0'), q_b => DGains_dm_iq, q_a => DGains_dm_ir, address_a => DGains_dm_aa, data_a => DGains_dm_ia ); Resolution The dual write ports are not supported now, however it will enhance in future version. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']