Output Pins May Toggle Incorrectly for EMIF Interfaces on Certain Stratix V Devices - Output Pins May Toggle Incorrectly for EMIF Interfaces on Certain Stratix V Devices Description Designs coverted from SOPC Builder that use pipeline and clock crossing bridges with bursts disabled and data widths other than 32 bits have incorrect Maximum burst size values. Resolution There is no workaround for this issue. This issue will be fixed in a future version. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 12.0.2 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']