Why does the HDMI Intel® FPGA Sink IP encounter intermittent loss of lock problems? - Why does the HDMI Intel® FPGA Sink IP encounter intermittent loss of lock problems? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 20.3, the HDMI Intel® FPGA Sink IP may intermittently lose its lock. This problem is due to the HDMI Intel® FPGA Sink IP being released from reset before the respective FPGA RX transceiver channel has reached the ready status. Therefore, for correct operation, the IP should be held in reset until the transceiver is ready. Resolution This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 1508885003 True ['HDMI'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 21.1 20.4 ['Arria® 10 FPGAs and SoCs', 'Cyclone® 10 GX FPGA', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']