Error(129001): Input port CLK on atom "ALTDDIO_OUT_component|auto_generated|ddio_outa[0]", which is a twentynm_ddio_out primitive, is not legally connected and/or configured - Error(129001): Input port CLK on atom "ALTDDIO_OUT_component|auto_generated|ddio_outa[0]", which is a twentynm_ddio_out primitive, is not legally connected and/or configured Description You may see this error when compiling a design containing an instantiation of an altddio_out or altddio_in primitive targeting the Intel® Arria® 10, Intel Cyclone® 10GX, or Intel Stratix® 10 device family. Resolution This error occurs as the altddio_out and altddio_in primitives are not intended for use with these device families. Use the Altera GPIO IP Core instead of the altddio_out and altddio_in primitives for the Intel® Arria® 10, Intel Cyclone® 10GX, or Intel Stratix® 10 device families. Custom Fields values: ['novalue'] Troubleshooting FB: 507553; False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Standard'] No plan to fix 17.0 ['Arria® 10 FPGAs and SoCs', 'Cyclone® 10 GX FPGA', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']