Why does the Intel® Stratix® 10 MX EMIF Traffic Generator 2.0 (TG2) tool hang and/or show incorrect readdata when configured in sequential mode? - Why does the Intel® Stratix® 10 MX EMIF Traffic Generator 2.0 (TG2) tool hang and/or show incorrect readdata when configured in sequential mode? Description The sequential address mode is incorrect when using an Intel® Stratix® 10 MX device in Half Rate (HR) mode. Due to an issue with data masking, the sequential address increment is off by 1 for odd increments. Resolution This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 22.2 onwards. Custom Fields values: ['novalue'] Troubleshooting 14012517352 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software'] 22.2 21.1 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']