Why does the QSPI HWMgr driver does not support idle cycles? - Why does the QSPI HWMgr driver does not support idle cycles? Description The SoC Hardware Library (HWLIB) configures and controls the SoC Quad Serial Peripheral Interface (QSPI) Controllers. The QSPI HWLIB source can be found in the /ip/altera/hps/altera_hps/hwlib/src/hwmgr/alt_qspi.c file. The alt_qspi.c file in the 15.0 and earlier releases of SoC EDS contains the definition of the function alt_qspi_device_read_config_set, but does not provides the functionality to wait extra clock idle time when necessary. Resolution To workaround this problem, a simple counter can be added in the alt_qspi_device_read_config_set function declaration to add the possibility to wait for extra clock cycles when alt_qspi_is_idle() == false . This problem is scheduled be fixed in a future version of the Altera SoC Embedded Design Suite. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 14.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']