Why does the DMA test of the Intel® FPGA P-Tile Avalon® Memory Mapped (Avalon-MM) IP for PCI express* generated example design causes the host system to hang? - Why does the DMA test of the Intel® FPGA P-Tile Avalon® Memory Mapped (Avalon-MM) IP for PCI express* generated example design causes the host system to hang? Description Due to a problem in the Intel® Quartus® Prime Pro Edition software version 19.4, you may encounter above issue when performing the DMA test of the Intel® FPGA P-Tile Avalon® Memory Mapped (Avalon-MM) IP for PCI express* generated example design. Resolution This problem has been fixed in the Intel® Quartus® Prime Pro Edition software versions 20.1 Custom Fields values: ['novalue'] Troubleshooting 14010610396 True ['Avalon-MM Stratix® 10 Hard IP for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.1 19.4 ['Agilex™ 7 FPGA F-Series', 'Stratix® 10 DX FPGA'] ['novalue'] ['novalue'] ['novalue']