PCI Express User Guide Specifies Wrong Arria II GX Support for Avalon-MM 62.5 MHz Application Clock - PCI Express User Guide Specifies Wrong Arria II GX Support for Avalon-MM 62.5 MHz Application Clock Description IP Compiler for PCI Express Gen1:× soft IP variations that support an Avalon-MM interface and target an Arria II GX device can support a 62.5 MHz application clock, but hard IP variations that support an Avalon-MM interface and target an Arria II GX device do not support a 62.5 MHz application clock. This support status is not documented accurately in the user guide. This issue affects all SOPC Builder- and Qsys-generated IP Compiler for PCI Express variations that target an Arria II GX device. Resolution No workarounds are required. This is a documentation error only. This issue is fixed in version 11.0 of the IP Compiler for PCI Express User Guide . Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 11.0 10.0 ['Arria® II FPGAs', 'Arria® II GX FPGA'] ['novalue'] ['novalue'] ['novalue']