Why does failure happen when running a hardware test with Serial Lite IV design example on the F-Tile of Intel Agilex® Device? - Why does failure happen when running a hardware test with Serial Lite IV design example on the F-Tile of Intel Agilex® Device? Description Due to a problem in Intel® Quartus® Prime Pro Edition Software version 22.4 and earlier, HSSI_PARAMETER assignments are missing in the .qsf file of Serial Lite IV hardware example design on F-Tile of Intel Agilex® devices. As a result, hardware tests may fail in external loopback mode. Resolution To work around this problem in Intel® Quartus® Prime Pro Edition Software version 22.4 and earlier, the user needs to add HSSI_PARAMETER assignments in the .qsf file manually to set values below: txeq_main_tap, txeq_pre_tap_1, txeq_pre_tap_2, txeq_post_tap_1, rx_ac_couple_enable, rx_onchip_termination Please refer to F-tile Architecture and PMA and FEC Direct PHY IP User Guide for assignment values and examples. This problem has been resolved in the Intel® Quartus® Prime Pro Edition Software version 23.1. Custom Fields values: ['novalue'] Troubleshooting 15012320055 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 23.1 22.3 ['Agilex™ 7 FPGA I-Series'] ['novalue'] ['novalue'] ['novalue']