What is the supported frequency range for the E-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP reference clock? - What is the supported frequency range for the E-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP reference clock? Description The E-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP in the Intel Quartus® Prime Pro Edition Software versions 18.1.1 and before shows the supported reference clock frequency range between 125 MHz - 500 MHz. The supported reference clock frequency range supported by the E-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP is intended to be 125 MHz to 700 MHz. Resolution 125 MHz to 700 MHz reference clocks support for E-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP is supported in the Intel Quartus® Prime Pro Edition Software versions 22.4. Custom Fields values: ['novalue'] Troubleshooting 1408565834,1507073611 False ['Stratix® 10 E-Tile Transceiver Native PHY'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.4 18.0 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']