Why does my Altera Hard IP for PCI Express hang on Txs read in root port modes? - Why does my Altera Hard IP for PCI Express hang on Txs read in root port modes? Description Due to a problem in the Quartus® II 15.0 software, in root port mode, reads via the Txs interface might hang (not complete) following several read access through the CRA interface. Resolution This behavior is caused by the Avalon-MM bridge not increasing the credits consumed counters for TLPs generated from the CRA interface. The workaround is: Install Quartus 14.1. Go to the Quartus 14.1 installation directory and find the following: <version>/ip/altera/altera_pcie/altera_pcie_av_hip_avmm/avalon_mm_128 <version>/ip/altera/altera_pcie/altera_pcie_av_hip_avmm/avalon_stif Copy all files to the same folders of your Quartus 15.0 installation, overwriting all the existing files. Then reopen Quartus/Qsys 15.0 and re-generate the Hard IP. Please note the above directories are used for both Arria 10 and Arria V devices. This is scheduled to be fixed in a future release of the Quartus software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 15.0 ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Arria® 10 GT FPGA', 'Arria® 10 GX FPGA', 'Arria® 10 SX FPGA'] ['novalue'] ['novalue'] ['novalue']