What is the minimum transceiver reference clock frequency for an Arria 10 device fPLL? - What is the minimum transceiver reference clock frequency for an Arria 10 device fPLL? Description The minimum refclk frequency for an Arria® 10 device transceiver fPLL is 50MHz. The Quartus® Prime will not allow the use of a reference clock below 50MHz other than when used with the HDMI Design Example. For the HDMI Design Example only, a 25MHz refclk is used. Refer to the Intel Arria® 10 HDMI IP Core Design Example User Guide to generate the HDMI Design Example. Related Articles The Arria® 10 Datasheet has been updated to show that a refclk frequency of 25MHz is only supported for the HDMI IP. Custom Fields values: ['novalue'] Troubleshooting FB: 447504; False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 16.1 ['Arria® 10 GX FPGA', 'Arria® 10 SX FPGA'] ['novalue'] ['novalue'] ['novalue']