Why do I see multiple drivers to always_ff output variable errors in the Cadence Xcelium simulation for the Agilex™ 7 FPGA F-Tile PMA/FEC Direct PHY IP Example designs? - Why do I see multiple drivers to always_ff output variable errors in the Cadence Xcelium simulation for the Agilex™ 7 FPGA F-Tile PMA/FEC Direct PHY IP Example designs? Description Due to a problem in the Quartus® Prime Pro Edition Software version 25.1.1, you will see errors when you run Cadence Xcelium simulation on the F-Tile PMA/FEC Direct PHY IP Example Designs about multiple drivers to always_ff output variable. Resolution To work around this problem in the Quartus® Prime Pro Edition software version 25.1.1, add below command in example_design/testbench/run_xcelium.sh: xmelab -warn_multiple_driver -relax -timescale '1 ps / 1 fs' -genhier -access +rwc top_tst This problem is fixed beginning with the Quartus® Prime Pro Edition software version 25.3. Custom Fields values: ['novalue'] Troubleshooting 30020115940 novalue ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 25.3 25.1.1 ['Agilex™ 7 FPGAs and SoCs', 'Agilex™ 9 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']