Why does Qsys state that the minimum clock frequency for the csr_clk in the Arria 10 Low Latency Ethernet 10G MAC IP core is 156.25MHz? - Why does Qsys state that the minimum clock frequency for the csr_clk in the Arria 10 Low Latency Ethernet 10G MAC IP core is 156.25MHz? Description In the Quartus® Prime software release 15.1 and earlier, Qsys incorrectly reports a minimum frequency of 156.25MHz for the csr_clk in the Arria® 10 Low Latency Ethernet 10G MAC IP core. Resolution The csr_clk in the Arria 10 Low Latency Ethernet 10G MAC IP core must have a frequency of 156.25MHz or lower. This problem is scheduled to be resolved in a future release of the Quartus Prime software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']