Critical Warning : Active Serial configuration mode is selected without INIT_DONE pin enabled. Depending on the configuration setup and board design, INIT_DONE pin may need to be enabled in the design. - Critical Warning : Active Serial configuration mode is selected without INIT_DONE pin enabled. Depending on the configuration setup and board design, INIT_DONE pin may need to be enabled in the design. Description You may get this Critical Warning message, when targetting a Stratix® V, Arria® V or Cyclone® V device and you have not enabled the optional INIT_DONE function in your Quartus® II project. Resolution In Active Serial (AS) multi-device configuration mode, Altera recommends that the INIT_DONE output pin option is enabled in the Quartus II software for devices in the configuration chain. Do not tie INIT_DONE pins together between master and slave devices. Monitor the INIT_DONE status for each device to ensure successful transition into user-mode. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V E FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA'] ['novalue'] ['novalue'] ['novalue']