Low Latency 10G MAC Auto-Generated SDC file is invalid when VHDL generation is used - Low Latency 10G MAC Auto-Generated SDC file is invalid when VHDL generation is used Description In versions 15.1 and 16.0 of the Quartus® Prime software, the auto-generated .sdc file for the Low Latency Ethernet 10G MAC is invalid for VHDL implementation of the IP. SDC constraints are ignored by the Timequest timing analyzer. Resolution This problem has been fixed in version 16.0 and later of the Quartus Prime software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 16.0 15.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']