18 Presets Give Errors for RLDRAM II Controller with UniPHY - 18 Presets Give Errors for RLDRAM II Controller with UniPHY
Description If you select any preset with –18 (for example, MT49H64M9-18, MT49H32M18-18, MT49H16M36-18), you see the following error: Error: <variation>: Memory clock frequency must be between 170 MHz and 500 MHz Resolution Ensure you change the frequency to a supported frequency.
Custom Fields values:
['novalue']
Troubleshooting
novalue
True
['novalue']
['FPGA Dev Tools Quartus II Software']
11.0
10.0
['Programmable Logic Devices']
['novalue']
['novalue']
['novalue'] - 2021-08-25
external_document